【摘 要】
：
Process variations for todays FPGA require reasonable approaches for timing analysis and optimization.In this paper,the reason that the slack result becomes
【机 构】
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System on Programmable Chip Research Department,Institute of Electronics,Chinese Academy of Sciences
【出 处】
：
The 4th International Workshop on Advanced Technologies in P
论文部分内容阅读
Process variations for todays FPGA require reasonable approaches for timing analysis and optimization.In this paper,the reason that the slack result becomes ineffective under process variations is demonstrated and a statistical delay model is proposed to translate statistical static timing analysis into classical static timing analysis.In classical static timing analysis,negative slack means that a timing constraint is violated,thus a hybrid routing strategy is developed to optimize the paths whose slack are negative.Experimental results show that,using the hybrid routing strategy,the number of paths with negative slack can be optimized(reduced)by 85.8% on average compared with the VPR timing-driven routing algorithm,while the run-time is only increased by 15.02% on average.
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