【摘 要】
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In the application of wireline and wireless systems,the interfaces are required to have their transmitters follow the frequencies of the receivers,which is
【出 处】
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ICFPT-IEEE International Conference on Field Programmable Te
论文部分内容阅读
In the application of wireline and wireless systems,the interfaces are required to have their transmitters follow the frequencies of the receivers,which is called loop timing,like SDH,SONET,and SDI interfaces.In the previous design solutions,its usually realized by adding external PLL chipsets.However,Virtex-7 series with phase interpolator(PI)module and logical digital filter implemented by logic,the loop timing is flexibly achieved with no need of external PLL chipsets.In this talk,we will briefly introduce the loop timing feature of SDH/SONET interface realized on PI module in Virtex-7 platform,as well as the test of the output jitter.
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