Thanks to the boom of the China semiconductor industry, there is a huge demand for VLSI test professionals in the market.However, due to the inadequacies in VLSI test education and research in the past, there exists a big gap between university education and industry needs. In this paper, the authors introduce how Teradyne and the School of Microelectronics of Shanghai Jiao Tong University came together to try to fix this problem. A newly developed course called VLSI Packaging & Testing was offered to the students in the fall semester of 2007. The authors focus on the logics and philosophies in developing the course materials to ensure it to be well received by the students.The course turned out to be a big success and could be used as a model to encourage more collaboration between the semiconductor industry and the academic world in order to effectively and efficiently address the new challenges as the semiconductor technology advances.