The metal-ferroelectric-insulator-semiconductor field-effect transistor (MFIS-FET) has received much attention because of its promise for applications in low-power, low-voltage, highdensity nonvolatile memories.In such multilayer system, the misfit strain exists inevitably.In this paper, at first, considering the effects of the misfit strain and temperature on the polarization properties of ferroelectric layer, an improved P-E hysteresis loop model is proposed based on Miller model.Then, combining this improved P-E hysteresis loop model with basic equations of semiconductor devices, the effects of mismatch strain and temperature on the electrical characteristics of MFIS-FETs are investigated.Both simulation and experimental results indicate that the compressive strain increases while tensile strain decreases memory window of MFIS-FETs.The simulation results also indicate that the memory window of MFIS-FETs reduces with increasing operating temperature.