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混合信号片上系统(SoC)模拟核的测试是SoC测试的难点之一,常用片上数模转换器(DAC)、模数转换器(ADC)配合模拟核进行测试。本文对于片上DAC、模拟核、ADC同时待测的情况,基于模拟核的振荡测试、ADC柱状图测试和DAC脉宽测试等方法,提出联合测试方案。将重构模拟核产生的三角波振荡信号,分别作为ADC柱状图测试和DAC脉宽测试的激励,并引入ADC和DAC的直连测试作为补充,构建三者两两之间的联合测试。该方案在对电路进行少量重构的条件下,自生成并复用测试激励,可实现对单故障的定位并解决双故障掩盖问题。
Mixed-signal system-on-chip (SoC) simulation The core test is one of the challenges of SoC testing, commonly used on-chip digital-to-analog converters (DACs) and analog-to-digital converters (ADCs). In this paper, we propose a joint test scheme for on-chip DAC, analog core, simultaneous ADC test, analog core-based oscillation test, ADC histogram test and DAC pulse width test. The triangular wave oscillation signals generated by the reconstruction of the simulated nucleus are respectively used as stimulus of the ADC histogram test and the DAC pulse width test. The direct test of the ADC and the DAC is introduced as a supplement to construct a joint test among the three. Under the condition of a small amount of reconfiguration of the circuit, the scheme generates and reuses the test stimulus from self, and can realize the single fault location and solve the double fault concealment problem.