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1.I~2C总线电压和波形测量(1)I~2C总线电压测量由于CPU的I~2C总线输出端口的内部电路结构是属于漏(或集电极)极开路形式,因此,当I~2C总线空闲时(不传输数据时),I~2C总线端口总是处于高电平状态。当I~2C总线上传输数据时,CPU的I~2C总线端口电压稍有降低。由于CPU需要时刻与小信号处理电路交换数据,所以,一般来说,在I~2C总线上总有时钟信号
1.I ~ 2C bus voltage and waveform measurement (1) I ~ 2C bus voltage measurement Since the internal circuit structure of the I ~ 2C bus output port of the CPU belongs to the open (or collector) pole open form, when I ~ 2C When the bus is idle (not transmitting data), I ~ 2C bus port is always in high state. When the I ~ 2C bus to transmit data, the CPU I ~ 2C bus port voltage slightly lower. Because the CPU needs to exchange data with the small signal processing circuit at all times, in general, there are always clock signals on the I ~ 2C bus