提出在 SOI p- MOSFET中采用 Ge Si源 /漏结构 ,以抑制短沟道效应 .研究了在源、漏或源与漏同时采用 Ge Si材料对阈值电压漂移、漏致势垒降低 (DIBL)效应的影响 ,并讨论了 Ge含量及硅膜厚度变化对短沟道效应及相关器件性能的影响 .研究表明 Ge含量应在提高器件驱动电流及改善短沟道效应之间进行折中选择 .对得到的结果文中给出了相应的物理解释 .随着器件尺寸的不断缩小 ,Ge Si源 /漏结构不失为 p沟 MOS器件的一种良好选择 It is proposed that Ge Si source / drain structure be used in SOI p-MOSFET to suppress the short channel effect.The effects of Ge Si on the threshold voltage drift, drain-induced potential barrier reduction (DIBL) Effects of Ge content and thickness of silicon film on the short-channel effect and the performance of related devices are discussed.The results show that the Ge content should be compromise between increasing the device driving current and improving the short-channel effect. The corresponding physical interpretation is given in the resulting text.With the shrinking device size, the Ge Si source / drain structure is a good choice for p-channel MOS devices