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概况 SKHIT 01型SCR/晶闸管触发器模块是为触发半控制桥设计的。图1示出SKHIT 01的结构框图。周期性振荡器(4)和十进制计数器(5)产生方波信号,以 10 μs的周期性脉冲持续系数和10 kHz的频率彼此延迟时间。这些脉冲通过比较器和输出放大器(6)及串联电阻器(7)直接到达单个晶闸管门极。如果加在该晶闸管上的电压是负的,或者没有释放信号,那么, 触发器脉冲信号将被消除。驱动器脉冲的相位关系与电线电压的相位关系没有关系。
At a Glance The SKHIT 01 SCR / Thyristor Trigger Module is designed to trigger half control bridges. Figure 1 shows the block diagram of SKHIT 01. The Periodic Oscillator (4) and Decimal Counter (5) generate a square wave signal that delays time from each other with a periodic pulse duration of 10 μs and a frequency of 10 kHz. These pulses reach the single thyristor gate directly through the comparator and output amplifier (6) and the series resistor (7). If the voltage applied to the thyristor is negative, or did not release the signal, then the trigger pulse signal will be eliminated. The phase relationship of the driver pulse has no relation to the phase relationship of the line voltage.