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可动态配置的FPGA电路的出现产生了时序规划问题.如果把时间看作第三维度,那么该问题可转化为三维布局问题.本文提出了一个全新的三维受限切面网格结构(3DBSSG),用来表示三维布局的解;并引入解空间平滑机制来搜索最优解。实验结果证明,所设计的基于3DBSSG的算法在求解时序规划问题上是十分有效的.
The emergence of dynamically configurable FPGA circuits has led to the problem of timing planning, which can be translated into a three-dimensional layout problem if time is considered as the third dimension.This paper presents a new 3D constrained cut mesh structure (3DBSSG) Used to represent the solution of the three-dimensional layout; and introduced the solution space smoothing mechanism to search for the optimal solution. Experimental results show that the proposed algorithm based on 3DBSSG is very effective in solving the problem of timing planning.