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用0.25μmCMOS工艺实现一个复杂的高集成度的2.5Gb/s单片时钟数据恢复与1∶4分接集成电路.对应于2.5Gb/s的PRBS数据(231-1),恢复并分频后的625MHz时钟的相位噪声为-106.26dBc/Hz@100kHz,同时2.5Gb/s的PRBS数据分接出4路625Mb/s数据.芯片面积仅为0.97mm×0.97mm,电源电压3.3V时核心功耗为550mW.
A complex, highly integrated 2.5Gb / s single-chip clocked data recovery and 1: 4 tap IC is realized with a 0.25μm CMOS process, corresponding to 2.5Gb / s of PRBS data (231-1), recovered and divided Of the 625MHz clock phase noise -106.26dBc/Hz@100kHz, while 2.5Gb / s PRBS data tapped 4 625Mb / s data chip area of only 0.97mm × 0.97mm, the power supply voltage 3.3V core work The consumption is 550mW.