论文部分内容阅读
提出了一种适用于按比例缩小至亚10nm的圆柱体全包围栅场效应管.报道了圆柱体全包围栅场效应管器件物理分析、技术仿真结果以及器件制作详细工艺流程.与其他常规鳍形场效应管器件(FinFET)相比,该器件特别适用于解决常规鳍形场效应管器件所面临的问题,进一步提高器件性能及按比例缩小能力.技术仿真结果显示,圆柱体全包围栅场效应管具备许多常规鳍形场效应管器件,其中包括长方体全包围栅场效应管所不具备的优点.就圆柱体全包围栅场效应管器件结构而言,该器件由无数多个将圆柱体形沟道全部包围的栅所控制.由于克服了由不对称场的积聚,如锐角效应所导致的漏电,器件沟道的电完整性得到很大改善.详细讨论了器件制作工艺流程,提出的工艺流程简单并且与常规CMOS工艺流程兼容.
A full-scale cylindrical field-effect transistor for scaling down to sub-10nm is proposed.The physical analysis, simulation results and detailed process flow of the device are reported.Furthermore, Compared with FinFET, the device is especially suitable for solving the problems of conventional FinFET devices and further improving device performance and scalability.Technical simulation results show that the full encircling gate field The effect transistor is provided with a number of conventional fin-shaped field-effect transistor devices, including the advantages not available in a rectangular solid-encased field-effect transistor device. In terms of a fully encased gate field effect transistor device structure, Channel surrounded by all the control.Because overcome the asymmetric field accumulation, such as acute angle effect caused by leakage, the device channel electrical integrity has been greatly improved.Detailed discussion of the device manufacturing process, the proposed process The process is simple and compatible with conventional CMOS process flow.