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可能你已经听说过PLL时钟源,它是一种在所有PC主板上产生时钟的器件,亦用于其它电子系统。目前有很种基于PLL的时钟源可供选择,其中多数属于零延迟缓冲一类。 本文提出的一些考虑问题的角度,旨在帮助用户针对特定应用选择适当的PLL时钟。显然,选择哪种器件取决于系统要求,但本文的角度可帮助用户达到设计要求,并且不致因使用某种古怪的器件而付出高昂的代价,其中某些功能你可能永远用不到。
You may have heard of the PLL clock source, a device that generates a clock on all PC boards and also for other electronic systems. Currently there are a variety of PLL-based clock sources to choose from, most of which fall into the category of zero-delay buffers. Some of the issues raised in this article are designed to help users choose the right PLL clock for their particular application. Obviously, the choice of which device depends on the system requirements, but the perspective of this article can help users meet the design requirements, and will not pay for using a weird device at a high price, some of which you may never use.