法国CEA-LETI公司、法国萨瓦大学(Universite de Savoie)及意法半导体(STMicroelectronics)共同分析了在带有65 nm工艺CMOS电路的硅晶圆上形成TSV(硅贯通孔)时,TSV对CMOS电路特性的影响。以利用单一MOSFET以及101个逆变器电路构成的环形振荡器电路为对象,调查了形成TSV时所带来的热机械性(Thermo-Mechanical)影响和电气性影响。此为首次在实验水平上 When CEV-LETI, France, Universite de Savoie and STMicroelectronics analyzed the TSV (through-silicon vias) formed on a silicon wafer with a 65 nm process CMOS circuit, the TSV vs. CMOS Effect of circuit characteristics. A single MOSFET and a ring oscillator circuit composed of 101 inverter circuits were used to investigate the thermo-mechanical and electrical effects of the TSV formation. This is the first time at the experimental level