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This paper presents a low power 2.4 GHz transceiver for ZigBee applications.This transceiver adopts low power system architecture with a low-IF receiver and a direct-conversion transmitter.The receiver consists of a new low noise amplifier(LNA) with a noise cancellation function,a new inverter-based variable gain complex filter (VGCF) for image rejection,a passive quadrature mixer,and a decibel linear programmable gain amplifier(PGA). The transmitter adopts a quadrature mixer and a class-B mode variable gain power amplifier(PA) to reduce power consumption.This transceiver is implemented in 0.18μm CMOS technology.The receiver achieves—95 dBm of sensitivity,28 dBc of image rejection,and -8 dBm of third-order input intercept point(IIP3).The transmitter can deliver a maximum of+3 dBm output power with PA efficiency of 30%.The whole chip area is less than 4.32 mm~2. It only consumes 12.63 mW in receiving mode and 14.22 mW in transmitting mode,respectively.
This paper presents a low power 2.4 GHz transceiver for ZigBee applications. This transceiver adopts a low power system architecture with a low-IF receiver and a direct-conversion transmitter. The receiver consists of a new low noise amplifier (LNA) with a noise cancellation function , a new inverter-based variable gain complex filter (VGCF) for image rejection, a passive quadrature mixer, and a decibel linear programmable gain amplifier (PGA). The transmitter adopts a quadrature mixer and a class-B mode variable gain power amplifier PA) to reduce power consumption. This transceiver is implemented in 0.18 μm CMOS technology. The receiver achieves-95 dBm of sensitivity, 28 dBc of image rejection, and -8 dBm of third-order input intercept point (IIP3). The transmitter can deliver a maximum of +3 dBm output power with PA efficiency of 30%. The whole chip area is less than 4.32 mm ~ 2. It only consumes 12.63 mW in receiving mode and 14.22 mW in transmitting mode, respectively.