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本文论述高速信号处理系统KSP中的快速付里叶变换(FFT)的运算方式及其硬件化。KSP是把FFT作为它的基本运算的信号处理用的计算机,为了使其具有高速处理能力和运算功能,以及系统结构的灵活性,所以采用了流水的处理方式、总线指向形结构和微程序控制方式。FFT的算法,采用的是基-2 Sande算法,按in place方式执行。并且采用三组存贮器和FFT运算器联系起来进行流水处理。FFT运算器是由进行A+B,(A-B)×W~x计算的复数运算器(CAU),和它前后的数据排列器两部分组成,采用4段流水来实现。CAU是以新设计的复数乘法器作为它的结构中心,进行定点运算,采用了防止在运算中引起溢出和使其有效数字的位数下降到最少的方法。在FFT运算的存贮地址产生中,采用了巧妙地利用位倒序电路作排列转换的方法。另外,采用这种方法使得对于不同流水长度的各种运算器的地址产生变得很容易。
This article discusses the fast Fourier Transform (FFT) operation and its hardware in a high-speed signal processing system KSP. KSP is to use FFT as its basic computing signal processing computer, in order to make it with high-speed processing power and computing functions, as well as the flexibility of the system structure, so the use of water treatment, bus pointing structure and micro-program control the way. FFT algorithm, using a radix-2 Sande algorithm, according to the place of implementation. And the use of three sets of memory and FFT operator connected to the water processing. The FFT operator consists of a complex arithmetic unit (CAU) that computes A + B, (A-B) × W ~ x, and a data arranger before and after it, which is implemented using 4 stages of pipeline. The CAU uses a newly designed complex multiplier as its architectural center for fixed-point operations, using a method that prevents overflow and minimizes the number of significant digits in the operation. In the FFT operation of the storage address generation, the use of clever use of bit-reversed circuit for the conversion method. In addition, using this method makes it easy to generate addresses for various operators of different pipeline lengths.