Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum

来源 :Journal of Semiconductors | 被引量 : 0次 | 上传用户:limingminghappy
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This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata(QCA) technology.Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer,except for the parts where multilayer wire crossing was used.In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers.Using a 5-input majority gate in a multilayer,a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm.A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area,the requirement of QCA cells in the design and the input-output delay of the circuit.Over all,the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact. This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that programming designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input-output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flex ible and there is scope for the customizability of logic gate designs to make the circuit compact.
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