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提出了一个采用(2,1,7)卷积码+QPSK的中频调制解调方案,并在Xilinx公司的100万门FPGA芯片上实现了该系统。该系统在信噪比SNR为6dB左右时可实现速率超过1Mbit/s、误码率小于10-5的数据传输。
An intermediate frequency modulation and demodulation scheme using (2, 1, 7) convolutional code + QPSK is proposed, and the system is implemented on Xilinx 1000000 FPGA chip. The system can achieve data rate of more than 1Mbit / s and bit error rate less than 10-5 when SNR is about 6dB.