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设计了一种带隔直电容的交流耦合CTIA像元电路与数字相关双采样(DCDS)结构的CMOS图像传感器系统。在传统的CTIA像元电路中增加隔直电容,通过控制光电二极管的偏压,达到减小光电二极管暗电流的目的;同时采用片外数字CDS结构,通过在片外实现复位信号与像元积分信号的量化结果在数字域的减法,可以减小图像传感器像元的复位噪声和固定图案噪声(FPN)。基于0.35μm标准CMOS工艺对此CMOS图像传感器进行流片,像元阵列为256×256,像元尺寸为16μm×16μm。测试结果表明交流耦合CTIA像元电路可以将光电二极管的偏压控制在零偏点附近,此时其暗电流最小;采用了数字CDS结构后,图像传感器像元的时域噪声及固定图案噪声均有不同程度降低。
A CMOS image sensor system with AC-coupled CTIA pixel circuit and DCDS structure with DC blocking capacitors was designed. In the traditional CTIA pixel circuit to increase the DC blocking capacitor, by controlling the bias voltage of the photodiode to achieve the purpose of reducing the dark current of the photodiode; while using off-chip digital CDS structure, through the realization of the reset signal and pixel integral The subtraction of the quantization result of the signal in the digital domain reduces the reset noise and the fixed pattern noise (FPN) of the image sensor pixel. The CMOS image sensor is based on a 0.35μm standard CMOS process. The pixel array is 256 × 256 and the pixel size is 16μm × 16μm. The test results show that the AC-coupled CTIA pixel circuit can control the bias voltage of the photodiode near the zero bias point, at which the dark current is the minimum. After the digital CDS structure is adopted, the temporal noise of the image sensor pixel and the fixed pattern noise There are different degrees of reduction.