A 10-bit 500 kHz low-power successive approximation register(SAR)analog-to-digital converter(ADC)for cryogenic infrared readout circuit is proposed.To improve the simulation accuracy of metal-oxidesemiconductor field-efect transistors(MOSFETs),corresponding modification in device model is presented on the basis of BSIM3v3 with parameter extraction at 77 K.Corresponding timing is adopted in comparator to eliminate the influence caused by abnormal performance of MOSFETs at 77 K.The SAR ADC is fabricated and verified by standard 0.35μm complementary metal oxide semiconductor(CMOS)process.At 77 K,measurement results show that signal to noise and distortion ratio(SNDR)is 54.74 dB and efective number of bits(ENOB)is 8.8 at the sampling rate of 500 kHz.The total circuit consumes 0.6 mW at 3.3 V power supply. A 10-bit 500 kHz low-power two-phase analog approximation register (SAR) analog-to-digital converter (ADC) for cryogenic infrared readout circuits is proposed. To improve the simulation accuracy of metal-oxide semiconductor field-efect transistors modification in device model is presented on the basis of BSIM3v3 with parameter extraction at 77 K. Corresponding timing is adopted in comparator to eliminate the influence caused by abnormal performance of MOSFETs at 77 K. The SAR ADC is fabricated and verified by standard 0.35 μm complementary Metal oxide semiconductor (CMOS) process. 77 K, measurement results show that signal to noise and distortion ratio (SNDR) is 54.74 dB and efective number of bits (ENOB) is 8.8 at the sampling rate of 500 kHz. The total circuit consumes 0.6 mW at 3.3 V power supply.