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通过利用改进型低压Tracking-VGS结构的栅源电压差ΔVGS,对NMOS晶体管的阈值电压进行补偿,提出一种全MOS低温漂电压基准源结构,获得了电源抑制特性较好的低温漂基准电压。基于2.5V65nm标准CMOS工艺,对电路进行HSPICE仿真验证。结果显示:在-40℃～125℃温度范围内,基准电压为1.1V,温度系数为1.6×10-5/℃,电源抑制比为-51dB。
By utilizing the gate-source voltage difference ΔVGS of the improved low-voltage Tracking-VGS structure to compensate the threshold voltage of the NMOS transistor, an all-MOS low-temperature drift voltage reference structure is proposed, and a low-temperature drift reference voltage with good power supply rejection characteristics is obtained. Based on 2.5V65nm standard CMOS technology, the circuit HSPICE simulation verification. The results show that the reference voltage is 1.1V, the temperature coefficient is 1.6 × 10-5 / ℃ and the power supply rejection ratio is -51dB in the temperature range of -40 ℃ ~ 125 ℃.