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在对现有全加器电路研究分析的基础上,提出了一种基于低功耗XOR/XNOR电路和多数决定门的新型高性能全加器电路。多数决定门采用输入电容和静态CMOS反相器实现,降低了电路的功耗,提高了运算速度。采用TSMC 0.18 μm CMOS工艺器件参数,对全加器进行Spectre仿真。结果表明,在2.4 V到0.8 V电源电压范围内,与已有的全加器相比,新全加器在功耗和延迟上都有较大程度的改进。
Based on the research and analysis of the existing full adder circuit, a new high performance full adder circuit based on low power XOR / XNOR circuit and majority decision gate is proposed. Most decisions gate using input capacitance and static CMOS inverter to achieve, reducing the power consumption of the circuit and improve the computing speed. Specter simulation of the full adder using TSMC 0.18 μm CMOS process parameters. The results show that the new full adders offer significant improvements in power consumption and latency over existing full adders in the 2.4 V to 0.8 V supply voltage range.