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位于美国加州Sunnyvale的Philips半导体公司是皇家Philips电子公司的一个分部,它所推出的第三代TrenchMOS（深槽MOS）工艺技术,可以将以MOSFET为基础的电路单元的尺寸进一步缩小。这项工艺技术是针对奔腾4甚至更新一代微处理器的技术要求而开发的。采用此项工艺技术以后,器件的单元密度可以达到50M单元/平方英寸。 此项工艺可以制成200V以下的MOS器件,可以广泛应用于dc/dc变换器,电压调节器,和syncFET等器件之中。现在推出的产品是属于这类器件中25到30V这一档的器件。 第三代工艺技术的特点包括:低阻的特殊导电层,方块电阻可达22mΩ/mm2-比现在一代工艺制成的电阻低40％。亚微米的槽宽降低了栅漏电容,减少了栅极电
Philips Semiconductors, a Sunnyvale, Calif.-based company that is part of Royal Philips Electronics, has introduced the third generation of TrenchMOS (deep trench MOS) process technology to further reduce the size of MOSFET-based circuit cells. This process technology was developed for the technical requirements of the Pentium 4 or even later generations of microprocessors. With this process technology, the device’s cell density can reach 50M cells / square inch. The process can be made MOS devices below 200V, can be widely used in dc / dc converters, voltage regulators, and syncFET devices. Products now available are those that belong to the 25 to 30V range of these devices. The features of the third-generation technology include: Low resistance special conductive layer with sheet resistance up to 22mΩ / mm2 - 40% lower than the current generation. The sub-micron trench width reduces the gate-drain capacitance and the gate current