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为了提高低密度奇偶校验码(LDPC)译码器的译码速度,提出了一种基于部分并行比特选择机制的快速多比特翻转算法.根据接收向量中错误具有随机分布的特点,将所有比特划分成若干子块,从每个子块挑选出1个候选翻转比特,再从这些候选比特中挑选出合理数目的比特进行翻转,完成译码迭代.此外,通过引入树形搜索和数据池技术降低该算法核心模块的计算复杂度,以进一步增加算法硬件实现时的译码速度.分析结果表明,相较于多比特翻转算法,利用所提出的算法和相关硬件实现技术,译码器的吞吐量能得到明显的提高.仿真结果验证了快速多比特翻转算法的有效性.
In order to improve the decoding speed of low density parity check code (LDPC) decoder, a fast multi-bit flipping algorithm based on partial parallel bit selection mechanism is proposed.According to the random distribution of errors in the received vector, all the bits Divided into several sub-blocks, one candidate flip bit is selected from each sub-block, and then a reasonable number of bits are selected from the candidate bits to be flipped to complete the decoding iteration. In addition, by introducing a tree search and data pool technology, The computational complexity of the core module of the algorithm can further increase the decoding speed of the hardware when the algorithm is implemented.The analysis results show that compared with the multi-bit flipping algorithm, the proposed algorithm and related hardware implementation techniques, the throughput of the decoder Can be significantly improved.The simulation results verify the effectiveness of fast multi-bit flipping algorithm.