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逐拍式心率计的输出如随着输入频率线性地变化的话,其制造成本将大大提高。如果线性不作为一个重要条件,那么就能获得良好的性能而造价又比较低。这里介绍的电路按低成本要求设计,并且只采用容易得到的元件。在线路图中,C2通过R2充电。电容器电压呈现于复零开关Tr1,并经Tr2缓冲后加至采样保持电路Tr3、C3和Tr4。A1和A2是单稳电路,其正常输出是低电平的。得自施密特触发器或比较器的至少3伏的正输入脉冲触发A1产生一个短暂的采样脉冲。采样脉冲的后沿转而触发A2产生一个相当宽的复零脉冲,复零脉冲使C2通过Tr1和R3
The output of a beat-based heart rate meter will increase dramatically as the input frequency changes linearly. If linearity is not an important condition, then good performance can be achieved at a lower cost. The circuit presented here is designed for low cost and uses only readily available components. In the circuit diagram, C2 is charged through R2. The capacitor voltage is presented to the complex zero switch Tr1 and buffered by Tr2 to be applied to the sample and hold circuits Tr3, C3 and Tr4. A1 and A2 are monostable circuits, the normal output is low. A positive input pulse of at least 3 volts from a Schmitt trigger or comparator triggers A1 to generate a brief sample pulse. The trailing edge of the sample pulse, in turn, triggers A2 to produce a fairly wide complex zero pulse that causes C2 to pass through Tr1 and R3