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随着集成电路的发展,器件尺寸进入纳米尺度领域,器件性能受到诸多挑战.针对纳米CMOS器件存在的问题,从可集成性考虑,基于由上而下途径,从新型双栅/多栅器件结构角度介绍新型非对称梯度低掺杂漏垂直沟道双栅MOS器件以及新型围栅纳米线MOS器件的研制及特性分析,为下几代集成电路技术的器件研究提供良好的思路.
With the development of integrated circuits, the device size has entered the nanoscale field, and the performance of the device has been challenged.Aiming at the existing problems of nanometer CMOS devices, from the view of integration, the new dual-gate / multi-gate device structure This paper introduces the development and characterization of a novel asymmetric gradient low-doped vertical drain dual-gate MOS device and a novel fence-gate nanowire MOS device. It provides a good idea for the device research of the next generation of integrated circuit technology.