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提出了一种低相位噪声时基核心电路的压控振荡器的设计方法。通过对采用由普通差分放大器单元和容性耦合差分放大器单元构成的环行振荡器的噪声分析得出，由容性耦合差分放大器单元构成的环行振荡器，因其带通特性和负阻特性而具有较好的抗噪声能力，可用于对频率稳定度有较高要求的ＶＣＯ等电路中。
A design method of VCO with low phase noise time base core circuit is proposed. By analyzing the noise using a ring oscillator consisting of a normal differential amplifier unit and a capacitively coupled differential amplifier unit, it is found that the ring oscillator composed of the capacitively coupled differential amplifier unit has, because of its band-pass characteristics and negative resistance characteristics, Good anti-noise ability, can be used for the VCO circuits with high frequency stability requirements.