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按照中国数字电视地面传输(DTMB)标准的要求,以基于现场可编程门阵列(FPGA)的DTMB调制器为基础,考虑专用集成电路(ASIC)的实现特点,针对DTMB调制器中低密度奇偶校验(LDPC)编码器和平方根升余弦(SRRC)滤波器,分别进行了存储资源和逻辑资源的优化,并成功应用于符合中国DTMB标准的系统信道编码调制芯片的设计。性能仿真和测试结果表明,优化后的LDPC编码器和SRRC滤波器在满足性能要求的同时,极大提高了存储资源的利用率,显著降低了逻辑资源的使用率,进而有效减小了DTMB系统信道编码调制芯片的实现面积。
According to the requirements of China Digital Television Terrestrial Transmission (DTMB) standard and based on DTMB modulator based on field programmable gate array (FPGA), considering the realization characteristic of ASIC, (LDPC) encoder and square root raised cosine (SRRC) filter, respectively, to optimize the storage resources and logic resources, and successfully applied to the design of the system channel coding and modulation chip in line with China’s DTMB standard. The performance simulation and test results show that the optimized LDPC encoder and SRRC filter not only meet the performance requirements, but also greatly improve the utilization of storage resources and significantly reduce the utilization of logical resources, thus effectively reducing the number of DTMB systems Channel coding modulation chip realization area.