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本文提出了一个可编逻辑阵列(PLA)的自动设计系统.它以逻辑函数作为输入数据,先后进行逻辑综合、PLA折迭以及自动生成版图的制版源程序.适用于多输出函数组合逻辑电路的设计,能够处理的输入变量和输出变量总数最多为32.文中对系统的两个主要部分作了介绍.首先,叙述了一种改进的折迭算法,提出了用以提高折迭效率的折迭参数法和交叉拆迭法,并介绍了完整的折迭过程.其次,叙述了版图自动生成的方法以及按照双极型工艺实现版图生成的过程.最后给出了本系统运行的若干结果.
In this paper, an automatic design system of programmable logic array (PLA) is proposed, which uses logic functions as input data, and then performs logic synthesis, PLA folding and automatic generation of plate-making source program, which is suitable for multi-output function combinational logic circuits The maximum number of input variables and output variables that can be handled by the design is 32. The two major parts of the system are described in this paper.First, an improved folding algorithm is described, and a fold to improve folding efficiency is proposed Parameter method and cross-over method, and introduces the complete folding process.Secondly, it describes the method of automatically generating layout and the process of generating the layout according to bipolar process.Finally, some results of this system are given.