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本文描述了一个可以内嵌到微处理器中,作为片上系统的内存管理单元的设计及完成细节。提出了一种设计64位超标量微处理器中存储管理单元体系结构的方法,实现了访存和访I/O的逻辑地址到物理地址的转换,讨论了TLB(Transla-tion Lookaside Buffer)设计中的关键技术以及在页级基础上提供的访问保护的实现,满足了LX-1164微处理器芯片的设计要求。在设计中,使用Verilog HDL语言进行描述,并在FPGA中实现,芯片采用0.18微米CMOS工艺实现。
This article describes the design and implementation details of a memory management unit that can be embedded in a microprocessor as a system-on-chip. A method to design the storage management unit architecture in a 64-bit superscalar microprocessor was proposed. The logical address-to-physical address conversion of memory access and I / O access was realized. The design of Translat-tion Lookaside Buffer (TLB) In the key technology and the page-level access protection provided to meet the LX-1164 microprocessor chip design requirements. Described in the design using Verilog HDL language and implemented in FPGA, the chip is implemented in a 0.18 micron CMOS process.