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设计了一种单片全集成、输出功率增益可变的CMOS功率放大器电路。功率放大器电路输出级通过电容分压实现阻抗匹配,输出功率增益通过三位数字控制位实现七级增益控制。该功率放大器基于SMIC 0.18μm CMOS工艺设计。测试结果表明,当功率放大器工作在2.4GHz时,功率增益可以从2.5dB变化到16dB。当增益为16dB时,功率叠加效率约为15%,输出1dB功率为8dBm。整个功率放大器芯片尺寸为1.2mm×1.2mm。
A fully integrated monolithic CMOS power amplifier with variable output power gain is designed. The output stage of the power amplifier circuit achieves impedance matching through the capacitor voltage divider, and the output power gain achieves seven-level gain control through the three-digit digital control bits. The PA is based on the SMIC 0.18μm CMOS process design. The test results show that the power gain can vary from 2.5dB to 16dB when the power amplifier operates at 2.4GHz. When the gain is 16dB, the power superposition efficiency is about 15% and the output 1dB power is 8dBm. The entire power amplifier chip size is 1.2mm × 1.2mm.