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近年来,对于多值逻辑,特别是对于三值数字逻辑系统的研究已引起了国际上的重视。采用三值数字逻辑电路比二值数字逻辑电路构成的数字设备具有节省设备、布线少、传输效率高、存储密度大等优点,更有利于集成度的提高。而在三值数字逻辑系统中真值为(1、0、1)的对称三值数字逻辑系(简称为ST逻辑系)又具有独特的优点,例如构成的三进制运算器进行加减法运算时不需要设置符号位,不需要求补运算等。因而在构成运算装置和应用于数字信号处理领域较为有效。本文提出了用互补型场效应管CMOS构成的一些门电路以及ST逻辑系的一些逻辑部件。
In recent years, research on multi-valued logic, especially for three-valued digital logic system, has attracted international attention. Digital devices with three-valued digital logic than binary digital logic devices have the advantages of saving equipment, less wiring, high transmission efficiency, storage density, etc., is more conducive to the improvement of integration. In the three-valued digital logic system, the symmetrical three-valued digital logic system (abbreviated as ST logic system) whose true value is (1,0,1) has unique advantages. For example, the ternary arithmetic unit formed by addition and subtraction Do not need to set the sign bit when computing, do not need to complement computing and so on. Therefore, it is more effective in the field of computing devices and applications in digital signal processing. This paper presents some of the gate circuits formed by complementary FETs and some of the logic components of the ST logic.