一、装置结构本次设计参考JJG1041-2008《数字心电图机检定规程》要求进行,实际装置是低频任意波形发生器、特定阻抗电路与切换电路的组合。对于低频信号发生器有多种方式实现,本装置采用的是DDS方式实现,具体的硬件结构如图1所示。本设计采用的是双DA结构,DAC0用于调整输出电压幅度与偏置量,DAC1用于输出特定波形数据,数据宽度都是12位。单片机ATMEGA64A用于驱动控制LCD1602、键盘、蜂鸣器、DAC、信号调整电路以及输出切换电路,同时需要输 First, the device structure The design reference JJG1041-2008 “digital electrocardiograph verification procedures” requirements, the actual device is a low-frequency arbitrary waveform generator, a specific impedance circuit and switching circuit combination. For a variety of ways to achieve low-frequency signal generator, the device is implemented using DDS, the specific hardware structure shown in Figure 1. This design uses a dual DA structure, DAC0 is used to adjust the output voltage amplitude and offset, DAC1 is used to output specific waveform data, the data width is 12 bits. MCU ATMEGA64A used to drive control LCD1602, keyboard, buzzer, DAC, signal conditioning circuit and the output switching circuit, also need to lose