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传统的时钟树布线算法可以扩展应用于门控时钟,例如在自底向上的合并过程中采用最小化合并电容方式。然而,当前点的合并,会影响到上层点的门控情况变化,虽然在局部合并时是最优的,却可能恶化时钟树整体功耗。针对该问题,提出了一种零时钟扭斜门控时钟布线算法,使用上一轮时钟树的布线结果估算上述影响所造成的合并代价变化。由于算法需要多轮反复计算,因此使用模拟退火方法,在每一次循环时重建时钟树结构,通过上一轮反标的合并代价信息进行优化,评估每一轮的结果,并生成新的约束供下一轮使用。实验结果表明,与传统的Greedy-DME算法相比,该算法可以获得至多23%的功耗优化。
Traditional clock tree routing algorithms can be extended for gated clocks, such as the minimization of merged capacitors in a bottom-up merge. However, the merging of the current points will affect the gating situation changes at the upper level, which is optimal in the case of local merging but may deteriorate the overall power consumption of the clock tree. Aiming at this problem, a zero-clock skew-gated clock routing algorithm is proposed to estimate the change of the merge cost caused by the above-mentioned impact by using the routing results of the previous clock tree. Because the algorithm requires multiple rounds of iterative calculations, the simulated annealing method is used to reconstruct the clock tree structure at each iteration, optimize with the merged cost information of the previous round of anti-signs, evaluate the results of each round, and generate new constraints for A round of use. The experimental results show that the proposed algorithm can achieve up to 23% power consumption optimization compared with the traditional Greedy-DME algorithm.