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提出了一种编码器硬件接口电路嵌入式系统方案,采用Verilog硬件描述语言在FPGA芯片上实现绝对值编码器信号抗干扰处理和实时数据采集,所采集的信号稳定可靠、抗干扰能力强。系统工程化应用结果验证了该方法的有效性。
An embedded system scheme of encoder hardware interface circuit is proposed. The Verilog hardware description language is used to realize anti-jamming of absolute encoder signal and real-time data acquisition on FPGA chip. The collected signal is stable and reliable and has strong anti-interference ability. The results of system engineering application verify the effectiveness of this method.