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对亚微米及深亚微米常规和轻掺杂漏（ＬＤＤ）ＭＯＳＦＥＴ性能进行研究。制作出常规及ＬＤＤ深亚微米ＭＯＳＦＥＴ。数值模拟和实测发现，对于深亚微米常规ＮＭＯＳＦＥＴ，只要设计适当，可在关态电流被限制在允许的条件内，利用降低工作电压减小热载流子效应以保证同样的可靠性，而其性能则可以高于需用更高工作电压的相同沟道长度ＬＤＤ器件，从而有利于器件面积的减小和工作功耗的降低。即使对于已经实际生产的０．５μｍ及０．３５μｍ沟道的器件情况也是如此。
The performance of sub-micron and deep submicron conventional and lightly doped drain (LDD) MOSFETs was investigated. Produced conventional and LDD deep sub-micron MOSFET. Numerical simulations and field measurements show that for the deep sub-micron conventional NMOSFETs, the proper design can be achieved by limiting the off-state current to within the allowable conditions and reducing the operating voltage to reduce the hot carrier effect to ensure the same reliability. However, Performance can be higher than the same channel length LDD devices that require higher operating voltage, which helps to reduce the device area and work power consumption. This is true even for devices that have been actually produced in 0.5μm and 0.35μm channels.