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本文给出了一种新型低噪声电流控制逻辑结构，用于在模／数混合集成电路的设计中取代静态CMOS逻辑，以减小数字开关噪声通过衬底耦合对模拟电路性能的影响．在分析了该逻辑的基本工作原理后，本文对电流控制逻辑的逻辑结构，开关特性，噪声特性和功耗及功耗-延迟积等性能与静态CMOS逻辑作了比较，并用电路模拟进行了验证．理论分析和电路模拟的结果都显示，和静态CMOS逻辑相比，新型电流控制逻辑的峰值噪声电流下降了近三个数量级．该逻辑具有很好的设计灵活性和低电压工作性能，并已成功地应用于一个高性能的过采样A／D转换电路中．
In this paper, a new low-noise current control logic structure is proposed to replace the static CMOS logic in the design of A / D hybrid ICs to reduce the influence of digital switching noise on the performance of analog circuits through substrate coupling. After analyzing the basic working principle of the logic, the paper compares the logic structure, switching characteristics, noise characteristics, power consumption and power-delay product of the current control logic with the static CMOS logic and verifies with the circuit simulation . Theoretical analysis and circuit simulation results show that the peak current noise of the new current control logic is reduced by nearly three orders of magnitude compared with static CMOS logic. The logic has good design flexibility and low-voltage operating performance, and has been successfully applied to a high-performance oversampling A / D converter circuit.