以雷达对抗为应用背景,给出超高速数据采集模块的实现方法,该模块由FPGA芯片完成各芯片之间的逻辑控制,具有设计灵活,采样速率高,海量数据传输,可靠性高等优点。详细阐述系统的设计思想,功能模块的划分以及各个模块的具体实现,并且给出测试结果,达到预期的设计目的。 Taking radar confrontation as the application background, an implementation method of the ultra-high-speed data acquisition module is given. The module implements the logic control between the chips by the FPGA chip, which has the advantages of flexible design, high sampling rate, massive data transmission and high reliability. Described in detail the design of the system, the division of functional modules and the specific implementation of each module, and gives the test results to achieve the desired design purpose.