选取具有对称系数的生成多项式,利用Top-down设计方法设计并用CPLD实现了RS(255,223)码编码器。该编码器可装入一片Flex8000系列EPF8820ATC144-2芯片中,所用逻辑单元数为537个(该芯片共有627逻辑单元),约8700个门,可稳定工作在10MHz频率上。与已有的相同设计相比,该设计具有较快的速度和较小的面积 Select the generator polynomial with symmetry coefficient, use Top-down design method to design and realize RS (255,223) code encoder with CPLD. The encoder can be loaded into a Flex8000 series EPF8820ATC144-2 chip, the number of logic cells used is 537 (the chip total of 627 logic cells), about 8700 gates, stable operation at 10MHz frequency. The design has faster speed and smaller area than the existing identical design