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为解决雷达、电子对抗等高性能计算应用中的存储访问带宽瓶颈,文中设计了一种多通道交织的存储架构,通过存储通道间的地址交织映射和集中式调度器的拆分与重组,实现了多个物理存储通道的并发访问,成倍提高了访存带宽,并具有良好的可配置和可扩展特性。该设计充分利用市场现有成熟的单通道控制器技术,经济高效。为评估性能,以4通道存储系统为例,建立了周期精确的RTL模型及其仿真验证环境。测试结果显示,交织粒度在64 B~512 B内系统获得最优性能,该性能是目前广泛采用的独立多通道存储架构性能的约4倍。
In order to solve the bottleneck of storage access in high performance computing such as radar and electronic warfare, a multi-channel interleaved storage architecture is designed in this paper. Through address interleaving mapping among storage channels and split and reorganization of centralized scheduler, The concurrent access to multiple physical storage channels multiplies memory bandwidth and provides good configurability and scalability. The design takes full advantage of the existing proven single-channel controller technology in the market and is cost-effective. To evaluate the performance, a 4-channel storage system is taken as an example to establish a cycle-accurate RTL model and its simulation verification environment. The test results show that the interleaved granularity achieves the best performance in the system of 64 B ~ 512 B, which is about 4 times the performance of the standalone multi-channel storage architecture that is widely used at present.