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本文提出了一种适合可编程序逻辑阵列的伪穷举测试方法。在增加少量硬件电路的基础上，通过巧妙的逻辑划分，使每个逻辑子块可用穷举测试法进行故障检测。在保证故障被测度达到１００％的同时，大大缩短了测试所需的时间。测试序列总长度仅为原始输入端数和乘积线数的乘积。
This paper presents a pseudo-exhaustive test method suitable for programmable logic arrays. Based on the addition of a small amount of hardware circuits, the clever logic divides each of the logic sub-blocks into an exhaustive test method for fault detection. In ensuring the fault is measured to reach 100% at the same time, greatly reducing the test time required. The total length of the test sequence is only the product of the number of original inputs and the number of product lines.