论文部分内容阅读
VLSI(超大规模集成)逻辑电路和存储器都建立在半导体器件技术的基础上,这种技术具有固有的快速性,但对负载亦是非常敏感的。因此,高性能的 VLSI 系统的设计就取决于可以采用的能清除绝大多数互连电容的总体封装概念。本文提出了这样一种 VLSI 封装概念。它有如下的特点:1.用于 VLSI 和其它 IC 芯片的混合电路封装方法,是用一块抛光的蓝宝石基板实现的,借助典型的单元电路互连金属化技术,在该基板上实现高密度多层互连。目前的光刻法容许使用的线宽和间距为6微米。这意味着,互连线和交叉点的寄生电容,与一般的薄膜或厚膜混合电路相比,可降低近2个量级。2.将 VLSI 器件和高密度混合电路互连技术结合起来使用,以便在单片监宝石基板上达到主计算机功能的集成度。这些功能,典型地讲,是一部完整的处理机,一部主存储器或一部信号处理机。因为这些主要的功能只需通过母线来相互联系,所以,所有更高一级的互连实际上已统统被取消了。3.蓝宝石基板的叠加以及它们之间的互连是借助于压力下的弹性接触实现的,这些接点只起电源、地线、母线和某些输入/输出互连等作用。4.这种由基板叠加而成的可拆卸的组装件,放在一个密封的容器中,可保证全部元件浸入气态(氦)或液态的冷却剂中。这种组装方法为 VLSI 提供一种理想的信号环境,并把简易性和可靠性、性能和极高的组装密度结合在一起。
VLSI (Very Large Scale Integration) logic and memory are based on semiconductor device technology, which is inherently fast but load-sensitive. Therefore, the design of a high-performance VLSI system depends on the overall package concept that can be used to remove most of the interconnect capacitance. This article presents such a VLSI package concept. It has the following features: 1. Hybrid circuit packaging method for VLSI and other IC chips is achieved with a polished sapphire substrate, with typical cell interconnect metallization technology to achieve high density and more Layer interconnection. Current lithography allows the use of line width and pitch of 6 microns. This means that parasitic capacitances at interconnects and intersections can be reduced by nearly two orders of magnitude compared to typical thin-film or thick-film hybrid circuits. 2. Combine VLSI devices and high-density hybrid circuit interconnect technology to achieve host computer integration on a monolithic gemstone substrate. These functions, typically, are a complete processor, a main memory, or a signal processor. Because these major functions only need to be interconnected via busbars, all higher level interconnects have virtually been eliminated. 3. The stacking of sapphire substrates and the interconnection between them are done by means of elastic contact under pressure. These contacts serve only as power, ground, bus and some I / O interconnects. 4. This detachable assembly of stacked base plates in a sealed container ensures that all components are immersed in gaseous (helium) or liquid coolant. This assembly method provides an ideal signal environment for VLSI and combines simplicity and reliability, performance and extremely high packing density.