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介绍了一种高速采样/保持电路,分析了电路的非线性效应。该电路基于0.18μm GeSi BiCMOS工艺,采用全差分开环结构,通过射极负反馈和前馈误差放大器来改善输入缓冲放大器的线性度。采用交换式射极跟随器开关,可以提高电路的采样速度,减小谐波失真。三级级联的输出缓冲减小了下垂率,并增大对后级电路的驱动能力。在3.3V电源电压和500fF负载电容下,采用Cadence Spectre进行仿真分析。结果显示,在相干采样模式下,采样率为1.28GS/s时,在27℃温度下,整个电路的SFDR为77dB,THD为-68.38dB,功耗为133mW;采样率为2.5GS/s时,各个温度下均满足8位的精度要求,可用于高速A/D转换器。
A high speed sampling / holding circuit is introduced, and the nonlinear effect of the circuit is analyzed. The circuit is based on a 0.18μm GeSi BiCMOS process with a fully differential open-loop structure to improve the linearity of the input buffer amplifier through emitter-negative feedback and feedforward error amplifiers. Switched emitter follower switch, you can increase the sampling rate of the circuit to reduce harmonic distortion. The output cascade of the three cascades reduces the rate of droop and increases the ability to drive subsequent circuits. At 3.3V supply voltage and 500fF load capacitance, using Cadence Specter for simulation analysis. The results show that the SFDR of the whole circuit is 77dB, the THD is -68.38dB and the power consumption is 133mW when the sampling rate is 1.28GS / s at 27 ℃. When the sampling rate is 2.5GS / s , Each temperature to meet the accuracy of 8-bit, can be used for high-speed A / D converter.