针对片上系统(SoC)中模数转换器(ADC)的测试,提出了一种测试IP核结构。IP核主要由模拟信号源、换位器和标准数模转换器(DAC)等组成,能够根据设计者不同的需求选择不同的测试方案。针对ADC的低位呆滞故障以及跳变故障的检测,提出了一种新的检测方法,解决了ADC低位故障检测困难的问题,该方法还可以用于对电压稳定度以及噪声的测量。通过对IP核数字电路部分的设计与仿真,证明IP核是可行的。 Aiming at the test of analog-to-digital converter (ADC) in system-on-chip (SoC), a test IP core structure is proposed. IP core is mainly composed of analog signal source, transposer and standard digital-to-analog converter (DAC) and so on, according to the different needs of designers to choose a different test program. Aiming at the low bit dull fault of ADC and the detection of transition fault, a new detection method is proposed to solve the problem of low bit error detection of ADC. This method can also be used to measure the voltage stability and noise. Through the design and simulation of the digital circuit part of IP core, IP core is proved to be feasible.