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由于反熔丝器件的一次可编程特性,反熔丝现场可编程门阵列(FPGA)在生产阶段很难完成对电路的功能测试验证。针对反熔丝FPGA典型的结构及其内部可编程逻辑模块(PLM)结构,分析了在编程前对PLM进行全功能测试的方法。设计了内建测试电路结构,用于内部PLM逻辑功能的测试。给出了内建测试电路的寻址寄存器、赋值寄存器以及检测电路的结构设计,电路在1.0μm双层多晶双层金属(2P2M)氧化层-氮化物-氧化层(ONO)反熔丝工艺上成功流片。测试结果表明,电路设计正确,解决了在芯片编程前完成基于反熔丝的一次可编程FPGA的内部PLM逻辑功能测试的难题,为后期研究反熔丝电路奠定了基础。
Due to the one-time programmable nature of anti-fuse devices, it is very difficult for an anti-fuse field programmable gate array (FPGA) to perform functional test verification of the circuit in the production stage. Aiming at the typical structure of antifuse FPGA and the structure of its internal programmable logic module (PLM), the method of fully testing the PLM before programming is analyzed. A built-in test circuit structure is designed for testing of the internal PLM logic functions. The design of the address register, the value register and the detection circuit of the built - in test circuit are given. The circuit is designed on the 1.0μm double polycrystalline double metal (2P2M) oxide - nitride - oxide (ONO) Success on the film. The test results show that the circuit design is correct, which solves the problem of testing the internal PLM logic function of one programmable FPGA based on anti-fuse before chip programming, which lays the foundation for the later research of anti-fuse circuit.