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电子封装是集成电路产品制造过程中的重要环节,而电子封装所产生的应力则可能会对芯片的性能及可靠性产生影响,因而受到业界的广泛关注。利用半导体压阻效应制造硅压阻应力传感器阵列芯片,将其倒装键合至印刷电路板,填充不同类型的下填料进行固化。通过测量应力传感器芯片上的力敏电阻变化,计算倒装键合和下填料固化等封装工艺引入的应力,并讨论了下填料的性能参数对芯片应力大小的影响。此外,在标定力敏电阻及压阻系数温度效应的基础上,对下填料固化过程的应力变化进行了实时监测,分析了下填料固化工艺引起的应力。
Electronic packaging is an important part of the manufacturing process of integrated circuit products. The stress caused by electronic packaging may have an impact on the performance and reliability of the chip. Therefore, it is widely concerned by the industry. Silicon piezoresistive stress sensor array chips are fabricated using a semiconductor piezoresistive effect, flip-bonded to a printed circuit board, and filled with different types of under-fill for curing. By measuring the change of the force sensitive resistance on the stress sensor chip, the stresses induced by the packaging process such as flip chip bonding and underfill curing are calculated. The influence of the performance parameters of the underfill on the chip stress is also discussed. In addition, on the basis of calibrating the temperature effect of the pressure sensitive resistor and the piezoresistive coefficient, the stress changes during the curing of the underfill are monitored in real time, and the stress caused by the underfill curing process is analyzed.