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联栅晶体管(Gate Associated Transistor)是由日本Hisao,Kondo等人在1979年提出的,它是一种双极型晶体管的改进结构,它有一个特殊的基区,基区一部分做得较深,其杂质浓度较其他部分为高,这个伸出基区部分相当于JFET的栅.在满足沟道夹断早于基区穿通的情况下,栅的存在使得联栅管在承担相同电压时,其基区宽度比BJT小得多.联栅管的出现,解决了高反压与高频之间的矛盾,同时使得在较低的集电区电阻率情况下得到较高的BV_(c()o).但联栅管在结构上也存在两个缺点:其一是器件的面积利用率较低,其二是在大电流情况下电流增益H_(FE)随I_C下降较之没有栅结构的普通BJT来得快,我们认为,这是因为栅墙的存在使
Gate Associated Transistor was proposed by Japan Hisao, Kondo et al. In 1979. It is an improved structure of bipolar transistor. It has a special base region, and the base region is partially deep, Its impurity concentration is higher than the other parts, this part of the extended base is equivalent to the JFET gate to meet the channel pinch off earlier than the base of the case, the gate so that the gate tube to assume the same voltage, its The width of the base region is much smaller than that of BJT. The advent of the gate tube solves the contradiction between high back pressure and high frequency, and at the same time makes the BV_ (c () However, there are two disadvantages of the gate-gate structure. One is that the area utilization of the device is low, and the other is that the current gain H_ (FE) decreases with the decrease of I_C at high current compared with that without gate structure Ordinary BJT came sooner, which we think is due to the presence of the grid walls