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首次提出一种自适应节能方法用于设计4/5高速双模预分频器,它的特点是工作在除4模式时,其中一个D类触发器处于休眠状态.使用台积电混合信号0.25μm CMOS工艺,采用这一自适应节能的设计方法,设计了一个具有源极耦合结构的4/5高速双模预分频器.仿真结果证明,这一新型4/5高速双模预分频器不受休眠到工作转换状态的影响,最高工作频率保持不变.同时,流片结果表明,当这一新型高速预分频器用于实现66/67分频时,可节省高达20%以上的功耗.
For the first time, an adaptive power-saving method was proposed for the design of a 4/5 high-speed dual-mode prescaler, which is characterized by one of the Type D flip-flops that is in sleep mode when operating in addition to 4. Using a TSMC mixed-signal 0.25μm CMOS Technology, a 4/5 high speed dual-modulus prescaler with a source-coupled structure is designed by using this adaptive energy-saving design method.The simulation results show that the new 4/5 high speed dual-mode prescaler The maximum operating frequency remains unchanged as a result of the hibernation to transition state, while the streaming results show savings of up to 20% or more when this new high-speed prescaler is used to achieve 66/67 divisions .