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本文对ALU中的加法器设计进行了详细论述,回顾了经典的加法器算法,结合同济大学微电子中心项目要求,提出了包含进位选择和超前进位两种思想的等延时结构,对64位全定制加法器的算法进行了改进。
In this paper, the adder design in ALU is discussed in detail. The classical adder algorithm is reviewed. Based on the project requirements of Tongji University Microelectronics Center, an equal delay structure including two options of carry selection and advanced carry is proposed. Bit-based custom adder algorithm has been improved.