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为了在TD-SCDMA移动终端实现高效联合检测,设计了一个用于2×2 MIMO系统的64/128点FFT处理器.设计的FFT处理器基于R2SDF的流水线结构,采用乘法器共享的电路结构,适合处理2路MIMO系统,在满足系统数据吞吐率的同时,节省了信号处理的硬件开销.设计采用Xilinx公司的Virtex4进行综合验证,同时采用SMIC13工艺综合,在50 MHz的时钟下,功耗估计为8.3 mW,实现了低开销的电路设计.
In order to achieve high-efficiency joint detection in TD-SCDMA mobile terminal, a 64/128 FFT processor for 2 × 2 MIMO system is designed.The designed FFT processor is based on R2SDF pipeline structure, adopts multiplier shared circuit structure, Suitable for processing two MIMO systems, to meet the system data throughput, while saving the signal processing hardware overhead. Design using Xilinx Virtex4 comprehensive verification, while using SMIC13 technology synthesis, at 50 MHz clock, power estimation 8.3 mW, to achieve a low-cost circuit design.