论文部分内容阅读
提出了一种虚拟仪器硬件平台控制芯片的设计方法和硬件软件化的设计思路,用Verilog HDL硬件描述语言进行设计,用EDA工具进行综合和仿真,在单片CPLD上实现了虚拟仪器硬件平台的控制和EPP并口通信的功能。
A virtual instrument hardware platform control chip design method and hardware software design ideas are presented. The design is done with Verilog HDL hardware description language, and the synthesis and simulation are carried out with EDA tools. The virtual instrument hardware platform is realized on the single chip CPLD Control and EPP parallel port communication function.